KiCad PCB design rules

KiCad's design rule check (DRC) finds a mistake before you order, but only when it knows the manufacturer's limits. KiCad's defaults are generic and differ from ours in several places. This guide gives you our limits and two ways to set them in KiCad 9 or 10: with our plugin or by hand.

The screenshots are from KiCad 10. In KiCad 9 a dialog may look slightly different. On a phone, tap a figure to enlarge it.

Pick your path

The CircuitNinja for KiCad plugin (KiCad 9.0.9.1 or later, or KiCad 10) is optional. It downloads our limits and writes them into your project, including the custom rules from step 3. It first saves a backup of the project and rules files. It replaces your custom rules unless you choose to append to them. Four things stay with you: the board size (step 1), the Copper to edge clearance field and the silkscreen fields (steps 2a and 2b), and the Net Classes check (step 2d). After that, go to step 4.

If you do not use the plugin, do steps 1 to 4 in order. Everything the plugin does, you can do by hand.

Our limits at a glance

These are the smallest sizes and distances we manufacture. The numbers on the cards match the list below the figure.

1. Track width and copper clearance (tracks, pads, copper zones): at least 0.2 mm each.
2. Annular ring (the copper ring around a hole): at least 0.12 mm.
3. Hole diameter: plated hole (PTH) at least 0.3 mm, non-plated hole (NPTH) at least 0.5 mm.
4. Hole to hole, measured between the hole edges: at least 0.2 mm.
5. Hole to board edge: at least 0.2 mm.
6. Board size: from 10 × 10 mm to 155 × 130 mm.

Silkscreen. We recommend text at least 1 mm high and lines at least 0.15 mm thick. This is advice, not a limit: we do not check the size of silkscreen text and lines. A missing silkscreen file is reported as a warning. Only the DRC in KiCad can warn you about the size, so set both values in step 2.

The available solder mask and silkscreen colours and other options are in the price calculator.

Step 1. Check the board size

Neither the plugin nor the DRC in KiCad checks the size of the board, so check it first. Open Inspect › Show Board Statistics and read the Dimensions row, which shows the width × height of the board. Both numbers must fit the range in card 6. The longer side may be up to 155 mm and the shorter side up to 130 mm, in either orientation.

Step 2. Enter the limits in Board Setup

In the PCB Editor, open File › Board Setup… and, in the left column, Design Rules › Constraints. The figure marks the fields: the fields marked 1 to 9 get a value from the table below, and the field marked A is the one that is not a limit.

2a. Copper to edge clearance

Set Copper to edge clearance (the field marked A) to 0.01 mm, which is almost zero. KiCad's default of 0.5 mm would flag copper at the board edge. We have no copper-to-edge limit: copper may be flush with the edge. Copper that crosses the outline is still flagged. We limit the distance of holes instead, and you add that in step 3.

2b. The fields marked 1 to 9

Fill in the fields marked 1 to 9 in the figure with the values from this table. The dialog is tall: scroll down to the Silk section for the fields marked 8 and 9. They are our recommendation, the others are our limits.

Minimum connection width covers the narrowest places in copper, such as necks in copper zones, so it has the same value as the track width. Minimum annular width applies to vias and to plated pads (PTH).

The 0.54 mm for Minimum via diameter is the 0.3 mm hole plus the annular ring on both sides, 0.3 + 2 × 0.12 mm.

2c. The other fields

Leave the other fields as they are, for example Copper to hole clearance. We have no limits for them. In the figure they show 0. A new KiCad project shows KiCad's defaults there, such as 0.25 mm for Copper to hole clearance.

2d. Net Classes

Open Design Rules › Net Classes. Net Classes are groups of nets that share a track width, a clearance and via sizes. In every class, check that these columns are at least:

• Clearance: 0.2 mm
• Track Width: 0.2 mm
• Via Size: 0.54 mm
• Via Hole: 0.3 mm

With smaller values KiCad draws new tracks and vias below our limits.

2e. Keep the dialog open

You need it in step 3.

Step 3. Add two custom rules

The Constraints page has no field for two of our limits. A custom rule is a short text that makes the DRC check one more thing. We need two:

• Non-plated holes (NPTH) and slots at least 0.5 mm wide. The first rule applies only to them.
• Holes at least 0.2 mm from the board outline, the line on the Edge.Cuts layer. The second rule checks holes, not tracks. It is not the same as the Copper to edge clearance field from step 2, which measures copper.

To add them:

1. In Board Setup, open Design Rules › Custom Rules.
2. If the field is empty, paste the whole block below. If it already has rules, paste only the two rules, below the existing ones. Leave out the first line, (version 1).
3. Click Check rule syntax. When the text is correct, KiCad shows No errors found.

(version 1)

(rule "CircuitNinja: NPTH diameter or slot width"
  (condition "A.Type == 'Pad' && A.Pad_Type == 'NPTH, mechanical'")
  (constraint hole_size (min 0.5mm)))

(rule "CircuitNinja: hole to profile"
  (condition "A.Layer == 'Edge.Cuts' || B.Layer == 'Edge.Cuts'")
  (constraint physical_hole_clearance (min 0.2mm)))

KiCad saves the rules to a .kicad_dru file next to the project.

Step 4. Run the DRC

Close the dialog with OK. Refill the copper zones (Fill All Zones, key B by default), then open Inspect › Design Rules Checker and click Run DRC. Fix every error and run the DRC again. If an error stays, see the next section.

When the DRC is clean, export the manufacturing files with the guide How to export Gerber files from KiCad, or upload the KiCad project straight to the price calculator.

What we check after upload

After you upload the files, we check the board automatically. We report the annular ring, hole to hole, hole to board edge, board size and a missing outline as errors. We report track width, clearance, hole diameters and missing copper, drill, mask and silkscreen files as warnings. The checks for track width, clearance and hole diameter are still in development and may miss real violations. Rely on the DRC in KiCad.

We check the annular ring of vias and plated holes on the outer layers only (top and bottom). We do not check inner layers. Holes lying on the board outline, such as castellated half-holes, are reported as errors. Holes outside the outline are reported as warnings.

You see the findings as a list in the order. The ones that concern a specific place are also marked on the board preview.

We do not check the size of silkscreen text and lines. A missing silkscreen file is reported as a warning. The 1 mm and 0.15 mm from step 2 are advice, and the DRC in KiCad is the only check for them.

If the DRC fails. Most errors name the rule or the setting they break and how far they miss. Silkscreen errors do not. For example:

• Hole size out of range (rule 'CircuitNinja: NPTH diameter or slot width' min hole 0.5000 mm; actual 0.4000 mm)

Then:

1. If the error names a CircuitNinja rule or one of the fields from step 2, change the board: make the hole larger, move it away from the edge, widen the track.
2. If it names "board setup constraints" for a field that you left alone in step 2, such as Copper to hole clearance, it comes from KiCad's default. That field is not one of our limits.
3. Run the DRC again.
4. If you do not understand an error or cannot fix it, write to us.